MMU

An MMU, or memory management unit, is a digital circuit that handles virtual-to-physical address translation and memory protection for a computer processor. In modern systems, it enables virtual memory, allowing each process to operate in its own address space and isolating processes from one another. The MMU often resides as part of the CPU, or as a separate component in the memory subsystem, and works with the operating system to enforce access permissions and control how memory is allocated and used.

Address translation typically uses a page-based scheme. A virtual address is split into a page number and an offset. The MMU uses a page table, whose base address is stored in a control register, to obtain the corresponding physical frame. To speed translation, most MMUs include a translation lookaside buffer (TLB) that caches recent mappings. If the translation is not in the TLB (a TLB miss), the MMU consults the page table in memory; if the page is not present, a page fault is generated, and the OS handles loading the page from secondary storage and updating tables.

Modern MMUs provide additional features: memory protection bits for read, write, and execute permissions; privilege levels; and support for virtualized environments through second-level address translation, e.g., extended page tables, allowing guest operating systems to map their own page tables. I/O memory management units (IOMMUs) extend these protections to devices performing Direct Memory Access, preventing devices from accessing arbitrary physical memory. Some microcontrollers use a memory protection unit (MPU) without full paging capabilities for simpler, deterministic systems.

MMUs are central to contemporary operating systems and architectures, enabling multitasking, isolation, and efficient use of physical RAM. They interact with caches, TLB coherence, and exceptions, and their design varies across x86, ARM, MIPS, and RISC-V families.