SMBus

SMBus, or System Management Bus, is a two-wire serial communication bus derived from I2C. It was developed in the 1990s by Intel and others as part of the SMBus specification maintained by the System Management Bus Committee. It provides a simple, low-speed protocol for monitoring and managing computer hardware and embedded devices, especially in motherboards, laptops, servers, and battery packs.

SMBus shares the I2C hardware topology: two wires called SDA and SCL; devices use open-drain or open-collector outputs with pull-up resistors to a supply voltage. Communications are master-driven; a master initiates transfers and slaves respond. The clock frequency is 10 to 100 kHz, with typical implementations at 100 kHz and a minimum of 10 kHz. The protocol emphasizes low power and robustness, with strict timing requirements and support for clock stretching as defined by the specification.

SMBus defines several transfer types: quick, byte, byte data, word data, and block data transfers; block data can transfer up to 32 bytes. It also supports the optional Packet Error Code (PEC) for error detection and an alert mechanism using the Alert Response Address (ARA) 0x18, enabling a master to identify devices that have asserted the SMBus ALERT line.

Addressing uses a 7-bit addressing scheme similar to I2C. The bus uses pull-ups to a defined supply, and devices operate at voltages compatible with their power rails; level shifting may be required when mixing devices of different voltages. SMBus is not a replacement for I2C but a stricter subset focused on system management. It is commonly used for battery management, temperature and voltage monitoring, and fan control in PCs and embedded systems. PMBus is a related extension built atop SMBus for power management.