Netlists

Netlists are textual descriptions of electronic circuits that specify components and how their terminals are interconnected. They serve as input to circuit simulators and other electronic design automation tools. A netlist lists devices such as resistors, capacitors, inductors, and transistors, and the nodes they connect to.

In a typical SPICE-style netlist, each line describes one component with a reference designator, its node connections, and a value or model. Example:

R1 N001 N002 1k

C1 N002 0 10p

M1 D N001 0 0 NMOS W=1u L=0.18u

This format makes clear which nodes each component touches and what its electrical characteristics are.

Netlists can be flat or hierarchical. Flat netlists list all elements in a single scope, while hierarchical netlists instantiate subcircuits or modules, enabling reuse and organization in large designs. Hierarchical netlists may include parameterized subcircuits with instances that connect to local and global nodes.

Generation and use: netlists are often produced automatically by schematic capture tools, layout and design environments, or by translating higher-level descriptions. They can be hand-written for testing or optimization. Netlists are used by simulators (such as SPICE, Spectre, or HSPICE) to perform DC, transient, AC, and noise analyses, and they underpin verification, optimization, and layout checks in both analog and mixed-signal workflows.

Conventions and notes: nodes are labeled with integers or strings, with node 0 commonly representing ground. Each device line references existing nodes, and hierarchical designs rely on subcircuit definitions and instance naming. Netlists remain a core, language-driven representation of circuit connectivity in modern design practices.