wordaddressable

Wordaddressable, or word-addressable, refers to a memory addressing scheme in which each address selects a whole memory word rather than a single byte. The size of a word is determined by the architecture and is commonly 16, 32, or 64 bits. In a word-addressable system, advancing one address moves to the next word, and access to subword data (such as bytes or bits within a word) may require special instructions or may be unsupported.

This approach contrasts with byte-addressable memory, where each address refers to an individual byte and words are formed by grouping multiple bytes. Byte-addressable systems are generally more flexible for handling text, character data, and byte-oriented I/O.

Historical context and usage: Word-addressable designs were more common in some early computers and in certain digital signal processors or embedded systems where the natural data unit matched the word length. Such designs could simplify memory logic and reduce address width for word-sized data. However, as software and data formats increasingly rely on byte-level granularity, most general-purpose processors have moved toward byte-addressable architectures.

Trade-offs: In word-addressable systems, addressing is efficient for word-sized workloads and can simplify computations on whole words. But they complicate access to bytes and other subword data, complicate I/O interfaces, and may require additional software or hardware to handle subword data. Consequently, modern mainstream CPUs are predominantly byte-addressable, though some niche devices and certain DSPs retain word-addressable characteristics. See also byte-addressable memory.