SPICEsimulation

SPICESimulation is a software framework for performing SPICE-like circuit simulations. It provides a netlist-driven engine that accepts standard SPICE syntax, supports hierarchical designs with subcircuits, and enables time-domain and frequency-domain analyses. The aim is to offer an extensible, interoperable platform suitable for education, research, and professional circuit design. The project emphasizes compatibility with existing SPICE models while enabling modern extensions and scripting-based workflows.

The core architecture includes a netlist parser, a matrix assembly and solver core, and a library of device models for resistors, capacitors, inductors, diodes, transistors, and behavioral elements. It offers multiple analysis modes, including operating point, transient, AC small-signal, and noise analysis, with a modular solver backend that can be swapped or extended. A time integrator handles stiff equations, and an API supports scripting languages for parameter sweeps, custom devices, and automation. The tool also provides data export in standard formats and optional visualization interfaces.

SPICESimulation is designed to be interoperable with other EDA tools through standard netlists and model formats. It supports import of vendor and open-source device models and can generate results suitable for downstream analysis. Use cases include circuit verification, parameter exploration, education, and research where rapid prototyping of models is required. Development emphasizes open documentation, community contributions, and extensibility.

Related topics include SPICE, circuit simulation, netlists, device modeling, and numerical methods for circuit analysis.