MC6850

The MC6850 is an asynchronous communications interface adapter (ACIA) manufactured by Motorola for use with the 6800/6809 family of microprocessors. It provides a hardware UART (universal asynchronous receiver/transmitter) and is designed to handle serial I/O, relieving the CPU from bit-level timing.

The device presents a simple, 8-bit data bus interface with three memory-mapped registers: a data register for both receiving and transmitting data, a status register that reports the state of the receiver and transmitter as well as error conditions, and a command/control register used to configure operation and interrupt behavior. Data to be transmitted is written to the data register, while received data appears in the data register upon a read. The status register exposes flags such as data ready, transmitter empty, and error indicators (for example framing, parity, and overrun errors). The command register enables or disables the receiver and transmitter, clears errors, and selects how interrupts are generated.

Operation and timing are driven by an external baud-rate clock. The MC6850 handles the framing of asynchronous data (start bit, data bits, optional parity, and stop bit) and places received bytes into the receive data register. If enabled, an interrupt request is generated to signal conditions such as data arrival or transmitter readiness, allowing the CPU to respond without polling.

Legacy and usage: The MC6850 was a common serial interface on 1970s–1980s microcomputer boards and game/industrial systems, providing a straightforward, CPU-friendly method for RS-232 or other asynchronous serial communication. It influenced later UART designs and saw various revisions and compatible successors in Motorola’s ACIA line.