LEFDEF

LEF and DEF are two widely used ASCII formats for exchanging physical design information in semiconductor design flows. LEF, or Library Exchange Format, describes the abstract geometry and technology constraints of standard-cell libraries and macro blocks, while DEF, or Design Exchange Format, describes the physical layout of a complete chip design after placement and routing, including instances, pins, nets, and die area.

Origins and governance: LEF/DEF were developed in the 1990s under the Silicon Integration Initiative (Si2) to standardize data exchange between library suppliers and EDA tools. They have evolved through multiple revisions and remain in use in many flows, with ongoing input from EDA vendors, foundries, and IP providers.

LEF content: A LEF file defines macros (cells) with bounding boxes, pins with port shapes and connectivity information, layer definitions, and routing rules. It also covers site and region information for floorplanning, layer stackups, via rules, and general technology constraints. LEF uses a defined unit system and provides an abstract description rather than full layout data.

DEF content: A DEF file captures a design’s physical realization: design name, units, die area, component instances with position and orientation, nets and pin mappings, routing tracks, and regional constraints. DEF describes placement and routing results rather than the abstract macro definitions.

Usage: In typical flows, LEF is supplied by library vendors to describe cell macros, while DEF is generated by place-and-route tools to describe the actual layout. Tools use LEF for macro legality and geometry checks during P&R and DEF for export to mask data formats and downstream flows.

Relation to other formats: LEF/DEF complement formats such as Liberty for timing data and GDSII for final mask data. They are designed to be technology-agnostic and broadly supported across major EDA vendors.