98B2s
98B2s refers to a series of high‑performance microprocessor units developed by SiliconTech Corp. The name derives from the original 98B family, with the “2s” suffix indicating the second generation of the second edition. These processors are built on a 7 nanometer CMOS process and feature a hybrid architecture that combines two independent CPU cores with a dedicated GPU cluster. The architecture supports a maximum clock speed of 3.8 GHz, offering up to 32 GB/s of memory bandwidth with DDR5 and 4 TB of on‑chip cache. The 98B2s integrates advanced power‑management circuits that enable dynamic voltage scaling down to 0.8 V, reducing idle power consumption by 35 % compared with the predecessor.
The 98B2s were released to the consumer market in 2025 and were subsequently adopted across several verticals.
SiliconTech’s design team highlighted the use of a coherent mesh interconnect that improves data locality, significantly