busmastering

Bus mastering is a capability of a device on a shared computer bus to initiate and control data transfers to or from the system memory without continuous CPU involvement. A bus-mastering device contains a DMA-like engine that, once configured by software with a source, destination, and transfer length, can request control of the bus and move data directly between the peripheral and memory.

How it works varies by bus architecture. On traditional parallel buses such as ISA or PCI, multiple devices may act as bus masters. The device requests the bus, an arbiter grants access, and the master drives address and data lines to perform the transfer. After the transfer completes, the device may signal completion via an interrupt. The CPU typically sets up the transfer in advance, and the DMA engine handles the remaining data movement. On PCIe, the concept is implemented through device DMA engines coordinated with the host’s root complex; while the exact arbitration model differs from legacy buses, devices can still perform direct memory access over the PCIe fabric.

Benefits of bus mastering include reduced CPU overhead, improved data throughput, and the ability to sustain high-rate I/O transfers without CPU intervention. Risks or challenges include potential contention on the shared bus, the need for proper synchronization and memory protection (often via IOMMU for isolation), and the importance of ensuring cache coherency and data integrity during DMA operations.

In practical use, bus mastering is common in high-speed storage controllers, network adapters, and other I/O devices that require efficient large-volume data transfers.