PLDs

Programmable logic devices (PLDs) are integrated circuits that can be configured by designers to implement custom digital logic after manufacturing. They provide flexible alternatives to fixed logic chips and traditional mask-programmed ASICs, enabling rapid prototyping, customization of peripherals, and hardware acceleration without custom silicon.

Historically, PLDs included PROM-based units, programmable logic arrays (PLAs), and programmable array logic (PAL) devices. PROMs encode a fixed program; PLAs provide programmable AND- and OR-networks; PAL devices feature a programmable AND array with a fixed OR network. GALs reprogrammable PALs used non-volatile memory to allow multiple programming cycles.

Today, the term PLD also encompasses Complex PLDs (CPLDs) and Field-Programmable Gate Arrays (FPGAs). CPLDs combine several programmable logic blocks with a programmable interconnect in a single chip, offering fast, deterministic timing for moderate-scale designs. FPGAs consist of large arrays of logic blocks, such as look-up tables and flip-flops, with extensive routing resources for very large and complex circuits, including embedded memory and specialized blocks.

Design flow typically begins with a high-level description or schematic, which is synthesized into a device-specific bitstream. Configuration is loaded via JTAG, serial links, or in-system programming. PLDs are commonly used for rapid prototyping, product differentiation, post-silicon fixes, and applications requiring reconfigurable hardware or short development cycles.

Compared with fixed ASICs, PLDs offer flexibility and shorter time-to-market at higher per-unit cost and, for large designs, higher power consumption. They remain widely used in consumer electronics, communications, automotive, and industrial systems.