PDSOI

Partially Depleted Silicon-On-Insulator (PDSOI) is a CMOS technology in which devices are built on a thin layer of silicon that sits on a buried oxide (BOX) layer atop a silicon handle wafer. In PDSOI, the silicon film is not completely depleted under normal operation, so a portion of the channel remains conductive even at low gate voltages. The BOX isolates the active silicon from the substrate, reducing parasitic capacitances and helping to suppress substrate-related leakage and latch-up.

Operation in PDSOI is influenced by a back-gate effect: the potential of the substrate beneath the BOX can modulate the transistor’s threshold and drive current. This allows body-biasing to tune performance and leakage, enabling dynamic adjustments for low-power operation or speed. The ability to apply a back-bias is a distinguishing feature compared with bulk silicon and is exploited to optimize energy efficiency and variability.

Advantages of PDSOI include reduced parasitic capacitance, improved drive current per area, lower leakage in some regimes, and strong immunity to latch-up. The technology can also offer favorable radiation tolerance in certain environments. However, back-gate sensitivity introduces threshold variability and requires careful design. Floating body effects, where the transistor body charge changes during operation, can cause current fluctuations and unpredictable behavior. Thermal management can be more challenging in SOI due to limited heat sinking through the BOX, and manufacturing costs may be higher than bulk processes.

PDSOI has been utilized in a range of applications, particularly where low power, high performance, and robustness to latch-up are valued, such as mixed-signal, RF, and space or defense electronics. It is related to but distinct from Fully Depleted SOI (FD-SOI), which uses thinner bodies and stronger depletion under the gate to reduce back-gate sensitivity.