Opcodes

An opcode, or operation code, is the portion of a machine language instruction that specifies the operation a processor should perform. It is typically a fixed or limited set of numeric values that the CPU’s control unit interprets and maps to a sequence of micro-operations. An instruction usually combines an opcode with operands that designate the data to be used and the addressing mode for locating that data.

Encoding varies by architecture. In fixed-length instruction sets, the opcode occupies a defined bit-field within the instruction word. In variable-length systems, the opcode may be extended by prefix bytes or additional opcode bytes. The exact encoding, including the number of bits and field positions, is defined by the instruction set architecture (ISA) of the processor.

Common architectures illustrate different approaches. In x86, opcodes are variable-length and can include prefixes that modify behavior; single-byte opcodes like 0x90 encode NOP, while other opcodes may be extended by extra bytes. In ARM, opcodes are embedded in 32-bit (or 16-bit in some modes) instruction words with fields for the operation, registers, and operands. In MIPS and RISC-V, a larger portion of the instruction word is dedicated to a primary opcode field, simplifying decoding and execution in a fixed format.

Decoding translates the opcode into control signals that orchestrate data paths, ALU operations, and memory access. Some complex instructions are implemented via microcode or multiple steps. Opcodes also appear in bytecode and intermediate representations used by virtual machines and managed runtimes, where they guide interpretation or JIT compilation.

In practice, the opcode set defines what an ISA can do, while assemblers and disassemblers convert between human-readable mnemonics and the machine codes used by hardware.