8nanometer

8 nanometer, often written as 8 nm, is a designation used in the semiconductor industry to describe a class of fabrication processes intended to offer higher transistor density and lower power than earlier generations. The name is largely a marketing label, and there is no universal standard that pins a single minimum feature size to all 8 nm implementations. In practice, the exact geometries — such as gate length, interconnect pitch, and transistor profiles — vary by manufacturer and process variant.

Historically, process-naming schemes have drifted from precise measurements to marketing terms as manufacturing techniques evolved. The 8 nm node is positioned in many roadmaps as an intermediate generation between 10 nm and 7 nm, rather than a strict, uniform technology shared across all foundries. Typical 8 nm offerings have employed multi-gate transistor architectures, such as FinFETs, to achieve better performance and leakage characteristics compared with earlier nodes.

Applications for 8 nm processes have included mobile application processors, GPUs, and other integrated circuits where a balance of density, speed, and power is important. However, the industry has increasingly emphasized objective metrics—transistor density, power-per-switch, and performance—over nominal node names, and many suppliers have since focused on 7 nm, 5 nm, and beyond.

Today, the 8 nm designation is largely historical and market-driven rather than a standardized specification. Designers and manufacturers commonly refer to node families in terms of performance targets and densities rather than a fixed lithographic measure.