64b66b

64b66b is a line encoding scheme used in high-speed serial communications to transmit data over a physical link. It encodes 64 bits of payload into 66 bits on the wire by adding a 2-bit synchronization header and applying a fixed pseudorandom scramble to the payload. The header helps with block alignment and indicates the type of the 66-bit word, while the scrambled 64-bit payload provides DC balance and sufficient transitions for reliable clock recovery.

The encoding reduces overhead compared with older schemes such as 8b/10b, yielding about 3% extra bandwidth for data transmission. The 2-bit header and the scrambling process together help maintain signal integrity over long links, particularly at high speeds. The approach emphasizes simplicity in hardware implementation while preserving essential coding properties like transition density and DC balance.

In operation, data are grouped into 64-bit blocks, scrambled, and prefixed with the 2-bit header to form 66-bit code words for transmission. At the receiver, the header is used to align the stream and identify data blocks, after which the 64-bit payload is descrambled to recover the original data. There is no inherent error-correcting code in 64b66b; higher-layer protocols or additional techniques are used for error detection and correction.

Applications and standards: 64b66b is used in several high-speed Ethernet standards, including 10 Gigabit Ethernet and higher-speed variants such as 40 GbE and 100 GbE, as defined by IEEE 802.3. It serves as the physical coding sublayer technique to enable efficient, scalable data transmission at multi-gigabit rates.

See also: 8b/10b encoding, DC balance, clock recovery, scramblers.