sampleandhold

Sample and hold (S/H) is an electronic circuit that captures an analog input voltage at a specific moment and then preserves, or holds, that value for a programmable period. It is widely used to stabilize signals for subsequent processing, such as analog-to-digital conversion, digital communication, and instrumentation.

Operation and topology: In a typical S/H circuit, a switch connects the input to a storage element, usually a capacitor, during the sampling or track phase. The capacitor charges to the instantaneous input voltage. When the switch is opened, the capacitor holds the voltage, which is then buffered and presented to a load or to an analog-to-digital converter. The timing of the switch is controlled by a clock, defining the track (sampling) and hold phases. A buffer amplifier is often placed after the capacitor to isolate the stored voltage from load variations and to provide a low-impedance output.

Key nonidealities and performance metrics: The hold value can drift due to leakage currents, leading to a droop over time that depends on the hold capacitor size and leakage. Finite on-resistance of the switch, charge injection when the switch opens, and clock feedthrough introduce errors during switching. Thermal (kT/C) noise of the hold capacitor, aperture time, and jitter also affect accuracy. Larger capacitors reduce droop and charge injection effects but increase area and settling time; smaller capacitors save area but worsen noise and droop.

Applications and variants: S/H circuits are fundamental in ADC front ends, sample-rate converters, digital receivers, and test equipment. Variants include track-and-hold configurations and matched CMOS switches or bootstrapped designs to minimize error. Integrated S/H blocks are common in mixed-signal integrated circuits, often optimized for speed, accuracy, and low droop.