HardwareBussen

Hardwarebussen, or the hardware bus, is a communication subsystem that transfers data between components within a computer system or between connected devices. It comprises electrical signaling paths, protocol rules, and control mechanisms that coordinate data flow. Buses can be internal, connecting the central processing unit, memory, and onboard controllers, or external, linking the computer to peripherals such as storage devices and expansion cards. A bus typically carries data, addresses, and control signals, and its width and signaling speed determine throughput and performance.

Historically, buses began as parallel, shared-medium connections where many devices shared the same wires. Modern designs increasingly favor point-to-point serial interconnects, which provide higher bandwidth and lower latency. On some systems, on-chip buses connect CPU cores, caches, memory controllers, and peripherals within a system-on-a-chip (SoC). Examples of bus families include system buses, memory buses, and peripheral buses.

Common bus types include PCI Express (a high-speed serial peripheral bus), USB (universal serial bus for I/O devices), SATA (storage interface), I2C and SPI (low-speed inter-chip buses), and older standards such as ISA, PCI, and VESA Local Bus. Memory and system buses specify how data and addresses travel between the processor and memory or controllers.

Key architectural concerns for hardware buses are bandwidth, latency, arbitration and bus mastering, protocol compatibility, and scalability. Today’s trends emphasize higher bandwidth, lower latency, and scalable point-to-point interconnects, with PCIe evolving across generations and multi-lane configurations to meet modern performance needs.

See also: computer bus, PCI Express, USB, I2C, SPI, AMBA.