FSUB

FSUB is a mnemonic used in several computer instruction sets to denote a floating-point subtraction operation. The instruction subtracts one floating-point operand from another and stores the result in a floating-point destination register or stack slot. The exact operand order, encoding, and supported precisions (such as single or double precision) vary by architecture.

Variants and operand order can differ between ISAs. In some architectures, a related variant known as FSUBR (reverse subtraction) performs the subtraction with the operands in the opposite order. Because of these differences, the precise behavior of FSUB and any reverse-subtraction form is documented in the reference for the specific processor or assembly language being used.

Context in computing practice often places FSUB within the floating-point arithmetic instruction set, alongside other operations such as FADD (addition), FMUL (multiplication), and FDIV (division). These instructions are used by compilers when lowering high-level floating-point expressions to machine code and by hand-written assembly in performance-critical routines.

In hardware, floating-point subtraction relies on a floating-point unit or SIMD/vector units that implement the necessary arithmetic. The existence and naming of FSUB may not be uniform across all architectures, but the fundamental concept—subtracting one floating-point value from another as part of numerical computation—remains consistent.

See also: FADD, FMUL, FDIV, FSUBR, FPU.