65C816

The 65C816 is a 16-bit microprocessor developed by Western Design Center (WDC) as a successor to the 6502. Introduced in the mid-1980s, it extends the 6502 architecture with a 16-bit data path and a 24-bit address space implemented via bank switching. This design allows access to up to 16 megabytes of memory across multiple banks while retaining compatibility with much of the 6502 instruction set.

Architecture and addressing: The processor uses a banked memory model with a program bank and a data bank to enable 24-bit addressing within a 64 KB-per-bank structure. In native mode, the accumulator and both index registers can operate in 16-bit form, controlled by the processor status flags. In emulation mode, the chip can behave like a traditional 6502, offering an 8-bit data path and a 64 KB address space, but can still leverage banked addressing in certain configurations.

Operation and features: The 65C816 remains largely compatible with the 6502 instruction set, while adding support for 16-bit arithmetic, expanded addressing modes, and bank-switching capabilities. It enables direct and indirect addressing across banks, supporting more complex software without abandoning the familiar 6502 programming model. The architecture also supports flexible interrupt handling and extended stack and memory access options inherent to its banked design.

Applications and legacy: The 65C816 found use in embedded systems and in several late-1980s/early-1990s products. Notable implementations include the Apple IIgs and the SNES-derived 5A22 core, which drew on the 65C816 lineage for expanded capabilities. The design influenced later generations of 6502-based processors and remains a subject of interest to retrocomputing and emulation communities.