faninfanout

Fan-in and fan-out are terms used in digital logic to describe how gates are interconnected. Fan-in is the number of inputs that feed a single logic gate. Fan-out is the number of gate inputs that can be driven by a single gate output while maintaining specified logic levels and timing. These concepts reflect a gate’s drive capability and the input characteristics of the following stage.

The load presented by a fan-out gate depends on the input characteristics of the driven gates. In DC terms, TTL inputs draw current; in CMOS terms, inputs present a capacitive load with very small steady-state current. Increasing fan-out adds more load, which can slow transitions, reduce noise margins, and raise power consumption. Therefore, the practical maximum fan-out is limited by the driver’s drive strength and the timing requirements of the circuit and is often specified in data sheets as a fan-out limit.

Calculation can be done statically by summing the input currents of all driven gates: if the output can source or sink a certain current, the maximum number of inputs is that current divided by the per-input current. For speed-sensitive designs, a dynamic view sums the input capacitances to estimate RC delays and settling times.

Differences between families: TTL gates typically have a more limited fan-out due to higher input current requirements, whereas CMOS gates present high input impedance and can tolerate larger fan-out, albeit with greater capacitive loading that affects timing. Designers may use buffers or intermediate stages to manage fan-out and preserve signal integrity. The term is commonly reported in datasheets as the usable fan-out for a given output/input combination.