VMulA
VMulA is a term used in discussions of vector processing to denote a vector multiply-accumulate operation, where an element-wise product of two source vectors is added to an accumulator to produce a destination vector. The basic form applies an element-wise multiplication X[i] * Y[i] and adds the result to a running total in D[i], i.e., D[i] = D[i] + X[i] * Y[i]. In some descriptions an explicit accumulator vector A is provided, giving D[i] = A[i] + X[i] * Y[i]. Depending on the architecture, D can also serve as the accumulator, yielding D[i] += X[i] * Y[i].
VMulA exploits data parallelism by applying the same operation to multiple elements simultaneously, typically via SIMD
Implementation and performance considerations vary by platform. VMulA is commonly realized as a multiply-accumulate instruction or
See also: Multiply-accumulate, MAC, FMA, SIMD, DSP, neural network accelerators.