Styrbussen

Styrbussen, literally meaning the control bus in Swedish, is a concept in computer engineering that describes the set of signals that coordinate and control transfers on a computer system's bus. It is distinct from the data bus, which carries the actual information, and the address bus, which specifies where the information should go or come from. The styrbussen carries timing, command, and status signals that synchronize operations between components such as the central processing unit, memory, and peripheral controllers.

A typical styrbussen includes signals for read and write operations, memory and I/O enable or select, as well as lines for bus request and bus grant, interrupt handling, clock distribution, and ready or wait signals. Together, these lines ensure that a component holds or releases the bus at the right moment and that data transfers occur in a controlled sequence. In older and some current designs, the control bus is defined as part of the system bus; in many modern architectures its function is implemented by tightly integrated control logic inside chips, reducing the need for separate external lines.

In Swedish documentation, styrbussen is used to discuss how devices communicate and coordinate on the bus, though the term is often translated as control bus in English. See also bus architecture, data bus, address bus, control unit.