SGDMA

SGDMA, or Scatter-Gather Direct Memory Access, is a DMA technique that uses a list of descriptors stored in system memory to describe a sequence of memory transfers. Each descriptor typically includes a source address, a destination address, a transfer length, and a pointer to the next descriptor. The SGDMA engine fetches descriptors, performs the specified transfers, and then follows the chain to the next descriptor, enabling non-contiguous buffers to be transferred without CPU intervention.

This approach allows efficient handling of fragmented data and large data sets by aggregating multiple smaller transfers into a single logical operation. Descriptors may describe transfers between memory and peripherals or between different memory regions, and they can be chained in linear or circular (ring) fashion to support continuous streaming. Some implementations support local buffering, data width conversion, and simple flow-control features to manage throughput and backpressure.

Typical SGDMA implementations are found as IP cores in FPGA environments and in some ASIC designs. They are configured by providing a starting descriptor address and control options via memory-mapped registers, and they report status or errors through interrupt lines or status registers. Descriptor formats are defined by the design and may include additional fields such as end-of-transfer indicators, status flags, or cache-coherence hints.

Advantages of SGDMA include reduced CPU load, efficient handling of scattered buffers, and better memory utilization for streaming or irregular I/O patterns. Limitations include the overhead of maintaining descriptor memory, potential latency from descriptor chaining, and the need for careful synchronization and cache management in multi-core systems. Typical use cases include network interfaces, storage controllers, and multimedia pipelines.