Numa

NUMA, or Non-Uniform Memory Access, is a memory design used in multiprocessor systems in which memory access time depends on the memory location relative to the processor. The system is divided into memory nodes; each node has its own DRAM and its own memory controller and is attached to a subset of CPUs. A processor can access memory from any node, but remote accesses incur higher latency and lower bandwidth than local memory.

Locality is central to NUMA performance. Keeping data and threads close to the processors that use them helps scalability as CPUs are added. Hardware typically provides multiple memory controllers connected by an interconnect with a topology such as rings, meshes, or crossbars. Intel and AMD have implemented NUMA in recent generations, using interconnects like UPI and Infinity Fabric to enable scalable memory bandwidth across sockets.

Operating systems expose the NUMA topology and offer policies to improve locality. Linux provides NUMA-aware scheduling, memory binding options, and the libnuma API; Windows offers similar capabilities and automatic NUMA balancing in recent versions. Developers use NUMA-aware allocators and thread pinning to optimize locality, bearing in mind possible drawbacks to load balancing.

NUMA contrasts with Uniform Memory Access architectures, where memory latency is uniform across locations. While NUMA can improve scaling, workloads with frequent remote memory accesses can lose performance, making careful data placement and workload tuning essential.