Gem5

Gem5 is an open-source, modular simulator for computer-system architecture research and education. It is designed to model full-system hardware as well as detailed microarchitectural components, enabling researchers to study performance, memory systems, and system-level interactions.

Gem5 supports multiple instruction set architectures, including x86, ARM, MIPS, SPARC, and RISC-V, and offers several CPU models ranging from simple in-order to detailed out-of-order timing simulations. It uses a flexible Python-based configuration language to assemble components such as CPUs, caches, memory controllers, buses, and network models into a complete system. The simulator can run in full-system mode, which executes an operating system on virtual hardware, or in syscall-emulation mode, which runs user-space binaries with minimal OS support.

Gem5 provides a rich instrumentation framework for statistics collection and analysis, with support for custom probes and a variety of reports. The project is maintained by a broad community of researchers and developers and is released under a permissive open-source license.

Users typically build gem5 from source, configure the desired system in Python, and run simulations to collect performance data. It is widely used in academic research and teaching to explore processor design decisions, memory hierarchies, and interconnection networks, as well as for design-space exploration and educational demonstrations.