tRASarvot

tRASarvot, or tRAS values, refer to the DRAM timing parameter known as Row Active Time. In dynamic memory, tRAS is the minimum duration that a row must stay open (active) after activation before it can be precharged. These values are typically specified in nanoseconds or, in some cases, as memory-clock cycles, and they appear in the memory module’s timing profile (SPD) and in BIOS/UEFI memory settings.

The role of tRAS is closely linked to other DRAM timings. A memory access begins with activating a row (ACT); after a short delay known as tRCD (Row to Column Delay) a column read or write can proceed. The row must remain open for at least tRAS to complete the operation before the row is closed by a precharge command, which takes tRP (Row Precharge). In many specifications the Row Cycle Time tRC is expressed as the sum of tRAS and tRP (tRC ≈ tRAS + tRP). A common practical guideline is that tRAS should be at least tRCD + tRP, ensuring there is enough time for the access to complete within the same row.

In practice, tRASarvot are read from SPD and can be adjusted in BIOS/UEFI as part of memory timing profiles or manual tuning. Lower values can reduce latency but may reduce stability on some modules, especially at higher speeds or densities. Higher values increase stability margins but can add latency and potentially reduce throughput. For most users, changes to tRAS are modest and are typically performed within a broader memory-overclocking strategy, such as enabling XMP/DOCP profiles and then fine-tuning a subset of timing parameters.

Overall, tRASarvot describe how long a DRAM row must stay active, balancing performance and reliability in memory systems.