tPLH

tPLH, short for propagation delay, low-to-high, is a timing parameter used in digital logic to describe how quickly a gate or similar device responds to a rising input signal. Specifically, tPLH is the time interval between the input crossing the 50% threshold while rising and the output crossing the 50% threshold as it rises. It is paired with tPHL, which covers the high-to-low transition.

In datasheets, tPLH helps characterize the speed of a device, along with tPHL. The overall propagation delay of a gate can be represented as an average or worst-case value derived from tPLH and tPHL, and is a key factor in timing budgets for synchronous designs and fan-out calculations.

Measurement and conditions: tPLH is measured under defined test conditions, typically with a single input switching from low to high while other inputs are held to valid logic levels, and with the output loaded by a specified load capacitance. The thresholds are usually at 50% of the supply voltage (Vcc). Values are reported at a given ambient temperature (commonly 25C) and supply voltage, and they vary with process, voltage, and temperature (PVT).

Factors influencing tPLH: device type, supply voltage, ambient temperature, load capacitance, and manufacturing process variations. In many devices, tPLH and tPHL are similar, but asymmetries can exist, so the two values are often specified separately.

Applications: tPLH is used in timing analysis to ensure proper setup and hold times, to assess maximum operating frequencies, and to estimate propagation delays in digital circuits.