phaselocked

Phaselocked describes the condition of a signal or oscillator that maintains a fixed phase relationship to a reference signal. In electronics and communications, phaselocked is typically achieved with a phase-locked loop (PLL), a feedback control system that continuously adjusts the frequency of a controlled oscillator to match the phase of the reference.

A PLL usually comprises a phase detector, a loop filter, and a voltage-controlled oscillator, with a feedback path from the oscillator output to the phase detector. The phase detector compares the phase of the VCO output with the reference; the resulting error signal is filtered and used to tune the VCO until the phase error is minimized. When lock is achieved, the output signal's phase becomes fixed relative to the reference, even as frequency may vary within the loop's capture range.

Phaselocked configurations enable a variety of applications, including frequency synthesis, clock recovery in digital communications, radio receivers and transmitters, and clock distribution in integrated circuits. They are also used in instrumentation and sensing to reduce phase noise and jitter by aligning local oscillators to stable references.

Practical PLLs have limitations, including finite capture and pull-in ranges, lock time, and sensitivity to noise and component tolerances. Real-world phaselocked systems may experience occasional unlocks due to disturbances or parameter drift, requiring re-lock procedures or design adjustments to maintain stable operation.