pagetabel

Pagetabel, in English typically called a page table, is a data structure used by virtual memory systems to translate virtual addresses into physical addresses. In paging systems, a process uses virtual addresses that consist of a page number and an offset. The pagetabel provides, for each virtual page, the corresponding physical frame number and status information. If the page is resident in memory, the translation yields a frame number and the offset; if not, a page fault occurs and the operating system must fetch the page from secondary storage.

Most systems implement a per-process pagetabel stored in main memory. An entry in the pagetabel usually contains the physical frame number, a valid or present bit, access permissions (read, write, execute), and other status bits such as a dirty bit or reference bit used by page replacement algorithms. To support large address spaces efficiently, modern architectures employ multi-level page tables or inverted page tables. A translation lookaside buffer (TLB) caches recent translations to speed up the address translation process, reducing the need to walk the pagetabel on every memory access.

Paging and pagetabellen enable virtual memory, process isolation, and memory protection, while also introducing overhead from page faults and table lookups. The page size (for example 4 KB or larger pages) influences the number of entries and the structure of the table. Hardware in the memory management unit (MMU) handles the translation, while the operating system manages page allocation, swapping, and replacement policies.