fanouts

Fan-outs are a key concept in digital electronics that describe how many inputs a single logic gate output can reliably drive. The fan-out is determined by the drive strength of the source gate and the input characteristics of the load gates; it sets the practical limit on how many gates can be connected to one output without degrading performance.

In practice, fan-out is defined as the maximum number of standard inputs that can be connected to an output while meeting specified electrical and timing requirements. The load presented to the output scales with the number of inputs multiplied by their input capacitance and current. When more inputs are connected, the capacitive load increases, which tends to slow down the signal’s transition and can cause timing violations or voltage level errors if the fan-out limit is exceeded.

The usable fan-out depends on technology and conditions. In TTL logic families, an output typically can drive about 10 standard inputs (on the order of ten). CMOS gates, with their higher input impedance, often allow higher fan-out, but practical limits are still set by propagation delay and power considerations. Factors such as supply voltage, temperature, device variation, and the specific gate types used also influence the acceptable fan-out.

To manage fan-out, designers use buffers or repeaters when a signal must drive many inputs or long interconnects. This restores signal integrity and maintains timing.

The term fan-out also appears in other contexts, such as networking and software, where it describes the number of downstream destinations or tasks that a single node can initiate or handle.