SRAMs

SRAM, or static random-access memory, is a type of volatile memory that stores each bit with a flip-flop circuit, typically implemented from transistors. Unlike DRAM, SRAM does not require periodic refreshing to retain data as long as power is supplied. This makes SRAM faster and simpler to interface, but more expensive to produce and less dense.

A standard SRAM cell uses a cross-coupled pair of inverters with access transistors to control read and write operations. The most common configuration is a 6-transistor (6T) cell, though higher-density variants such as 8T or 10T cells exist to improve stability and allow separate read and write paths. Memory arrays organize cells into rows (word lines) and columns (bit lines) and rely on sense amplifiers and write drivers to perform access. Some SRAMs are designed as asynchronous devices, while others are synchronous, driven by a clock for predictable timing in pipelines and caches.

SRAM is widely used for fast, low-latency storage in the memory hierarchy, including CPU caches (L1, L2, L3), on-chip scratch pads, embedded memory in microcontrollers, and certain networking products. Its speed and random access capability make it ideal for caches, but the per-bit cost and larger physical area limit its use for main system memory. Power consumption is generally higher per bit compared with DRAM at similar speeds, and densities are lower.

Compared with DRAM, SRAM does not require refreshing, but DRAM offers much higher density and lower cost per bit. Variants of SRAM include synchronous designs and non-volatile SRAM (nvSRAM) that combines SRAM with non-volatile storage technologies for data retention without power.