IDSs

Idss, denoted I_DSS, is the drain current of a junction field-effect transistor (JFET) when the gate-source voltage Vgs is zero, with a sufficient drain-source voltage Vds to place the device in saturation. It represents the maximum current that can flow through the channel at zero gate bias and serves as a key characteristic of a JFET.

For depletion-mode JFETs, Ids as a function of gate bias is commonly described by a Shockley-type relation: Id ≈ Idss [1 - (Vgs/Vp)]^2 for Vgs ≤ 0 up to the pinch-off voltage Vp (which is negative for N-channel devices). The pinch-off voltage, Vp, sets the gate control range. The transconductance at zero bias is gm ≈ 2 Idss / |Vp|, so Idss largely determines the device’s gain behavior with respect to gate voltage.

Idss varies widely among devices and lots, and is specified on datasheets as a range (Idss min to Idss max). Manufacturing tolerances, device grade, and temperature all affect Idss and can shift Id and gm in operating circuits. This variability is why designers often select devices based on Idss ranges to achieve consistent biasing and gain in analog applications.

Measurement and use: To measure Idss, the gate is tied to the source (Vgs = 0) and Vds is raised until Id saturates; the resulting drain current is Idss. Designers use Idss, together with Vp, to select devices and to design bias networks for preamplifiers and other analog circuits where a predictable drain current is required. See also JFET, pinch-off voltage, transconductance.