CXLmem

CXLmem, or CXL.mem, is a sub-protocol of the Compute Express Link (CXL) standard that defines how memory devices attach to a host system over a CXL connection. It enables cache-coherent access between the host processor and attached memory resources, allowing memory to be expanded or pooled beyond conventional DRAM DIMMs.

In practice, CXL.mem designates memory-capable endpoints that present a memory space the host can address directly. The host issues memory read and write commands to these endpoints, and the protocol specifies coherence and ordering semantics so that devices and the host can share memory without complex software-managed synchronization. This enables memory expansion across multiple CXL devices and supports dynamic attachment and detachment in supported systems.

CXL.mem is intended to support use cases such as memory pooling, where large aggregate memory capacity is formed from multiple devices, and accelerator memory access, where CPUs and accelerators can operate on a shared, coherent memory space. It is designed to work within a PCIe-based fabric and relies on host and device support, including appropriate drivers and firmware, to manage the memory space and coherency guarantees.

The CXL ecosystem includes several sub-protocols that work alongside CXL.mem, such as CXL.io for general device I/O and CXL.cache for cache-coherent caching interfaces. CXL.mem is part of ongoing standardization efforts by the CXL Consortium, with versions that have evolved to support more flexible memory topology, pooling, and performance features. The technology targets data centers, high-performance computing, and environments requiring scalable memory capacity and efficient memory sharing.