mmstorepd

mmstorepd is a mnemonic found in some x86 assemblers for the operation of storing 128 bits of packed double-precision floating-point data from a vector register to memory. The “pd” suffix indicates packed double-precision values (two 64-bit doubles, totaling 16 bytes). In practice, this operation moves a 128-bit vector from a register to a memory address.

Operands and behavior: the instruction takes a memory destination and a source vector register that contains two double-precision values. The exact form can vary by assembler dialect, but the conceptual result is storing the two doubles from the register into the target memory location. In many toolchains, the concrete encoding is provided by standard store instructions such as those that move 128 bits from a register to memory, with separate variants for aligned and unaligned memory access.

Relation to standard instructions: mmstorepd is not a universal, formally standardized mnemonic in mainstream x86 documentation. In many environments, the same operation is implemented by the established SSE2 instructions movapd (store, aligned) or movupd (store, unaligned), or by the corresponding intrinsic _mm_store_pd in high-level languages. The mmstorepd name may appear as a macro, alias, or dialect-specific shorthand in certain assemblers or legacy codebases.

Usage and context: this type of store is common in vectorized code paths that write a pair of doubles from a SIMD register to memory, often within performance-critical routines such as numeric kernels. When using MMX terminology, one must ensure proper transition to or from MMX and SSE states (for example, calling emms where appropriate). In modern code, developers typically rely on intrinsic APIs or standard SSE2 instructions rather than the dialect-specific mmstorepd mnemonic.

See also: _mm_store_pd intrinsic, movapd, movupd, SSE2, MMX.