halfadder

A half-adder is a simple digital logic circuit that adds two single-bit binary numbers. It has two inputs, A and B, and two outputs, sum (S) and carry (C). The sum is the XOR of the inputs (S = A XOR B), and the carry is the AND of the inputs (C = A AND B). The sum is 1 when exactly one input is 1, while the carry is 1 only when both inputs are 1. For the input pairs 00, 01, 10, and 11, the sum outputs are 0, 1, 1, 0 respectively, and the carry outputs are 0, 0, 0, 1 respectively.

Half-adders are implemented from basic gates, typically an XOR gate for the sum and an AND gate for the carry. Some designs implement the same logic with NAND gates using De Morgan transformations. A key limitation is that a half-adder has no carry-in input, so it cannot by itself add multi-bit numbers. It is thus used as a building block in more complex circuits, such as full adders and ripple-carry adders.

In digital arithmetic, the half-adder serves as a foundational component in arithmetic logic units, calculators, and microprocessors. A full adder, which adds three bits (two significant bits plus a carry-in), can be constructed by combining two half-adders and an OR gate to incorporate the carry-in. The half-adder’s simplicity and well-defined logic make it essential for understanding and implementing binary addition at the gate level.