cachehierarki
Cachehierarki, or cache hierarchy, is the multi level storage subsystem that sits between a processor and its main memory to reduce average data access time. It relies on the principle of locality, storing recently or frequently used data in fast, small caches so the processor can access it quickly. In modern systems the hierarchy typically includes L1, L2 and L3 caches, with occasional L4 caches or on-die memory components. L1 caches are the smallest and fastest and are often split into separate instruction and data caches per core; L2 caches are larger and slower and may be private to a core; L3 caches are larger still and are commonly shared among multiple cores.
Data requests flow from the processor to the highest level of the cache, and if the data
Cache coherence is a key concern in multi core and multi processor systems. Coherence protocols, such as
In sum, the cache hierarchy is a central mechanism for bridging processor speed and memory latency, improving