singlecycle

A single-cycle processor, often referred to as a single-cycle CPU, is a type of central processing unit in which the execution of every instruction completes in one clock cycle. In this design the clock period is driven by the longest possible path through the processor’s datapath for any instruction, so the cycle time must accommodate the most demanding operation.

In a typical single-cycle datapath, components include a program counter, instruction memory, a register file, an arithmetic logic unit (ALU), data memory, and a control unit that generates signals based on the opcode. During a single clock edge, the processor fetches an instruction, decodes it, reads operands, performs the operation in the ALU, accesses memory if needed, and writes results back to registers—all in one cycle. The control unit converts the instruction’s opcode into a fixed set of control signals that drive multiplexers, the ALU, and memory operations.

Advantages of this approach include simplicity and predictability, since the entire instruction completes within one cycle and the design is straightforward to verify. However, the requirement for the longest instruction path to fit within a single clock cycle imposes a relatively slow clock rate for complex instruction sets. This leads to limited performance and poor scalability as ISAs grow in complexity. Single-cycle designs are common in educational examples and small, simple CPUs, where clarity and teaching value outweigh performance goals. They are often contrasted with multi-cycle and pipelined architectures, which aim to increase throughput by overlapping instruction execution or breaking work into shorter stages.