FEOL

FEOL, or Front End Of Line, is the portion of semiconductor fabrication that builds the transistor structures on a silicon wafer before any wiring interconnects are added. It encompasses materials processing, diffusion and implantation, oxide growth, deposition of gate dielectrics and gate electrodes, and the formation of source and drain regions. Depending on the technology node, FEOL may also involve epitaxial growth, silicidation for contacts, and planarization steps to prepare surfaces for subsequent processing. In modern devices, FEOL covers the creation of wells or channels, the transistor body, and the gate stack for MOSFETs, including high-k dielectrics and metal gates where used. For advanced architectures such as FinFETs, FEOL includes defining fins and surrounding-gate structures that establish the active transistor region.

From a process-flow perspective, FEOL ends when the transistor structures and basic contacts are defined, prior to the first layer of metal interconnects. The subsequent BEOL, or Back End Of Line, handles interconnects, vias, and insulation layers that connect transistors into circuits. The boundary between FEOL and BEOL can vary by manufacturing line and technology, and some steps such as certain contact formations may be associated with either portion depending on the process flow.

Significance: FEOL largely determines transistor electrical characteristics, including threshold voltage, drive current, leakage, and variability. It is a major driver of yield, cost, and scalability in semiconductor fabrication. Advances in FEOL—such as new transistor geometries, dopant control, and gate stack materials—have been central to scaling and to enabling newer device architectures in modern integrated circuits.